Appeal No. 1997-2294 Page 3 Application No. 08/284,183 a data write control signal so that a power supply voltage may be selectively applied via the local data write driver circuits to the latch circuit and to a corresponding bit line. A pass transistor is coupled between the latch circuit and each of the local data write driver circuits to selectively apply an output signal from a local data driver circuit to the latch circuit and the corresponding bit line. Claim 8, which is representative for our purposes, follows: 8. A sense amplifier arrangement for an integrated circuit memory comprising: a latch circuit having internal nodes for coupling to a respective bit line pair; a pair of pass transistors each coupled to a respective one of said internal nodes, the pass transistors having a control electrode coupled to receive a first control signal; a pair of local data write driver circuits having respective control electrodes coupled to receive second write control signals for data write operations and to provide a pair of data write output signals, each local data write driver circuit being coupled to its corresponding pass transistor so that the pass transistor, when conductive, couples one of said output signals from the local data write driver circuit to the corresponding internal node of the latch circuit and to a corresponding bit line. The reference relied on in rejecting the claims follows:Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NextLast modified: November 3, 2007