Appeal No. 2000-0721 Page 2
Reissue Application No. 08/628,287
principal way of increasing such capacitance is through cell
structure techniques. Such techniques include three-
dimensional cell capacitors such as trenched or stacked
capacitors.
A conventional stacked "crown" cell capacitor features
upward, spire-like projections, which increase surface area
and corresponding capacitance as compared with planar
capacitors. More specifically, a semiconductor wafer
comprises a bulk substrate, word lines, a field oxide region,
and an active area for connection with a capacitor. The wafer
further comprises a layer of insulating dielectric through
which a desired contact opening is provided to the active
area. The contact opening has an elliptical or circular shape
circumscribed by sidewalls. The sidewalls are typically
smooth and straight. A layer of conductive material, such as
conductively doped polysilicon, is deposited atop the wafer
and within the contact opening. The deposited polysilicon
provides a storage node poly for formation of a capacitor
plate.
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