Appeal No. 2000-0721 Page 3
Reissue Application No. 08/628,287
The inventive construction provides a striated surface
for deposit of conductively doped polysilicon atop a wafer and
within a contact opening. Such a surface maximizes surface
area in both external and internal portions of the deposited
polysilicon. Increasing surface area, in turn, increases
capacitance.
Claim 53, which is representative for our purposes,
follows:
53. A stacked capacitor construction formed within a
semiconductor substrate comprising:
a layer of insulating dielectric material located on
the semiconductor substrate having at least one
contact opening therein, the contact opening
having striations in the sidewall;
an electrically conductive storage node, the storage
node having external sidewalls, the
external sidewalls each having a surface
thereon to maximize surface area and
corresponding capacitance, the surfaces of
the external side walls including striations;
a dielectric layer provided over the storage node
and
its associated external sidewalls, the
dielectric layer including striations; and
an electrically conductive layer provided over the
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