Appeal No. 1997-1695
Application No. 08/496,121
applied to opposite sides of transistor QB in Ichimura are
clearly shown not to be opposite in phase. In our view, the
Examiner has provided no persuasive evidence to indicate that
an opposite phase relationship of these input signals would
necessarily be established if a P-channel, rather than an N-
channel, transistor was utilized as the drive transistor in
Ichimura’s booster circuit.
In view of the above discussion, since all of the claimed
limitations are not disclosed by Ichimura, we do not sustain
the Examiner’s 35 U.S.C. § 102(b) rejection of claims 1 and
10.
Turning to a consideration of the obviousness rejection
of claims 2 through 6, 8, 12, 13, 15, 16, 19 through 22, and
25 through 27 based on Ichimura, we do not sustain this
rejection as well. With respect to independent claims 12 and
20, the Examiner reiterates his position discussed previously
with regard to the 35 U.S.C. § 102(b) rejection of independent
claim 10. In addition, the Examiner asserts the obviousness
to the skilled artisan of utilizing buffers to generate system
clock signals as recited in claim 12 as well as the use of
series connected inverters as buffer circuitry as recited in
10
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