Appeal No. 1997-2057
Application No. 08/287,670
managed, and allowing the retention of information stored in
the integrated circuit when the integrated circuit is operated
in a reduced power mode, and allowing submicrosecond recovery
of internal functional circuit function upon the assertion of
the second externally generated electrical signal.
The prior art references of record relied upon by the
examiner in rejecting the appealed claims are:
Chase et al. (Chase) 4,593,349 Jun. 03,
1986
Itano et al. (Itano) 4,906,862 Mar. 06,
1990
Takada 4,950,921 Aug. 21,
1990
Bolan et al. (Bolan) 4,952,817 Aug. 28,
1990
Faucher et al. (Faucher) 5,404,543 Apr.
04, 1995
(filed May 29, 1992)
Claims 7 through 9 stand rejected under 35 U.S.C. § 103
as being unpatentable over Takada in view of Bolan and
Faucher, and further in view of Itano for claim 8 or Chase for
claim 9.
Reference is made to the Examiner's Answer (Paper No. 17,
mailed January 7, 1997) for the examiner's complete reasoning
in
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