Ex parte YOSHIDA - Page 11




          Appeal No. 1997-3161                                                        
          Application No. 08/450,553                                                  


          the Examiner’s view (Answer, pages 5 and 6), since the claims               
          merely recite a particular voltage biasing without reciting                 
          the conductivity types of the substrate and source/drain                    
          regions, the claimed function of “erasing” is indeterminate.                
          In a related argument, the Examiner questions Appellant’s use               
          of the term  “erase” to categorize the injection of electrons               
          into the floating gate, alleging that such terminology is                   
          contrary to conventional usage in which “erase” would signify               
          the removal of electrons from the floating gate.                            
               After reviewing the arguments of record, we are in                     
          agreement with Appellant that no ambiguity or lack of clarity               
          exists in the claim language.  As we alluded to in our                      
          discussion concerning the lack of enablement rejection, the                 
          designation of the particular conductivity types of the                     
          various semiconductor regions in the claims is not necessary                
          for an understanding of the metes and bounds of the invention.              
          With respect to the Examiner’s concern with Appellant’s                     
          allegedly unconventional usage of the term “erase”, we note                 
          that, in addition to the clear definition of the term supplied              
          by Appellant at page 8 of the specification, several of the                 
          references cited by the Examiner in support of his position                 
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