Appeal No. 1997-3441
Application No. 08/614,920
respectively, with the second SiC layer including at least four
more heavily doped ion-implanted regions. Two of the more
heavily doped regions comprise MOSFET electrodes and two others
comprise resistors.
Claim 1 is illustrative of the invention and reads as
follows:
1. A silicon carbide (SiC) integrated circuit (IC)
including a depletion mode MOSFET and a resistor, comprising:
a first layer comprising SiC material doped to a first
conductivity type, the first conductivity type being p type
conductivity;
a second layer overlaid on the first SiC layer and
comprising SiC material doped to a second conductivity type, the
second conductivity type being n type conductivity, the second
SiC layer including at least four more heavily doped ion-
implanted regions of said second conductivity type, two of said
more heavily doped regions comprising MOSFET electrodes and two
others of said more heavily doped regions comprising resistor
electrodes, said second SiC layer including an isolation region
between said MOSFET electrodes and said resistor electrodes;
an oxide layer situated over said second SiC layer, at
least a portion of said oxide layer being positioned over a
portion of said second SiC layer between said MOSFET electrodes,
one of said MOSFET electrodes comprising a source electrode and
the other of said MOSFET electrodes comprising a drain
electrode;
a MOSFET gate electrode positioned over said portion of
said oxide layer between said MOSFET source and drain electrodes
and comprising an electrically conductive material; and
2
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