Appeal No. 1997-3442 Page 4
Application No. 08/210,288
permits an examiner to refer back to a single prior office
action in order to incorporate the grounds of rejection into
the answer. The examiner, however, refers back to the final
rejection which, in turn, refers back to the “Office Action of
Paper No. 7.”
We reverse.
A rejection under 35 U.S.C. 102, based on anticipation, is
proper only when a single prior art reference discloses,
expressly or under the principles of inherency, each and every
element of a claimed invention as well as disclosing structure
which is capable of performing the recited functional
limitations. RCA Corp. V. Applied Digital Data Sys., Inc., 730
F.2d 1440, 1444, 221 USPQ 385, 388 (Fed. Cir.); cert.
dismissed, 468 U.S. 1228 (1984).
With respect to independent claim 1, the examiner applies
Figure 1 of Adler, identifying word block WB1 and word block
WB0 as the claimed NAND memory cells; B0 as the claimed bit
lines; and Q GND as the claimed source lines. Further, on a
marked-up copy of Adler’s Figure 1, submitted with the answer,
the examiner identifies four transistors (transistors 1 and 3
being within word block WB1 and transistors 2 and 4 being
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