Appeal No. 1998-0747
Application 08/609,958
§ 1.196(b).
Claims 1, 2 and 5-7 are rejected under 35 U.S.C. § 103 as
unpatentable over Yajima. With respect to independent claim 1,
Yajima’s processor units 11 and 12 are a plurality of components,
at least one of which serves as a spare component. From column 6,
line 30, to column 7, line 15, Yajima teaches that unit 11 takes
over unit 12’s function when unit 12 experiences a fault. A
plurality of switches in the memory connection circuits 24 and 241 2
and the processor interface section 31 are connected to the inputs
and outputs of each of the components. The switches are
inherently present in circuits 24 and interface section so as to
direct data in and out of the common memory 32 and the control
processors 21 and 21 and main memories 22 and 22 A common memory1 2 1 2.
such as 32 provides data as inputs to the processor units 11 and
12 for processing, and receives processed data from the units.
The inputs and outputs of each component are the lines between
circuits 24 and the processor interface section 31. Inputs and
outputs between unit 12 and the common memory 32 may be rerouted
through the spare component 11
upon occurrence of a fault in component 12.
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