Appeal No. 1998-3024
Application No. 08/464,298
second phase-shifting means coupled to said second clock
means to produce fourth clock pulses phase-shifted by at least
approximately 90°;
means to couple said fourth clock pulses to said second
transmission gate to activate said second gate at the times of
occurrence of said fourth clock pulses;
and
means to couple together the outputs of said first and
second transmission gates to form a multiplexer for merging
the signals produced at the outputs of said first and second
transmission gates to develop a stream of signals
corresponding to a composite of said synchronized output
signals from said first and second clocked CMOS signal
sources.
The reference relied on by the examiner is:
Archer et al. (Archer) 3,947,697 Mar. 30,
1976
Claims 4 and 7 stand rejected under 35 U.S.C. § 103 as
being unpatentable over the prior art Figure 1 of the instant
application in view of Archer.
Reference is made to the briefs and the answers for the
respective positions of the appellant and the examiner.
OPINION
The obviousness rejection of claims 4 and 7 is reversed.
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