Ex parte REYNOLDS - Page 5




          Appeal No. 1998-3024                                                        
          Application No. 08/464,298                                                  


          shifted clock pulses for the two alternately-activated                      
          transmission gates respectively” to introduce phase shifts of               
          approximately 90 degrees, and that “[s]ubstitution of Archer’s              
          ‘delay circuit T’ between clock sources 14, 16 and the                      
          respective transmission gates 18, 20 would not meet that                    
          recital of Claim 4 because that delay circuit produces a fixed              
          time delay” (Brief, page 6).                                                
               In rebuttal, the examiner states (Answer, page 5) that                 
          “the claimed first and second phase shifting means are                      
          disclosed by the combination of the prior art Fig. 1 and the                
          Archer reference in that a delay is coupled to each gate                    
          output of the two clock means 14 and 16 so as to constitute                 
          first and second phase shifting means.”                                     
               Notwithstanding the time delay clocking teachings of                   
          Archer, we agree with appellant (Reply Brief, page 2) that:                 
                    Use of phase-shifting means assures that the                      
               signal source clock pulses are separated in time                       
               from the multiplexer clock pulses by a fixed number                    
               of degrees of the clock cycle (specifically, one-                      
               quarter of a CLK/2 cycle), not by a fixed time                         
               period as in Archer.  In applicant’s invention, the                    
               time duration between the signal source clock pulses                   
               and the multiplexer clock pulses will necessarily                      
               change with changes in clock frequency (e.g.,                          
               decreasing duration with increasing frequency).                        

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