Appeal No. 1998-3043 Application 08/667,587 the claim term “field-shield isolation structure.” We look first to the appellants’ specification. In the section of the specification entitled Background of the Invention, the appellants discuss methods for isolating circuit elements in a semiconductor device. From page 1, line 16 to page 2, line 14, it is stated: A so-called “field-shield isolation” method, which isolates elements by a MOS structure formed on a semiconductor substrate, has been proposed as an isolation method which does not generate the bird’s beaks. Generally, the field-shield isolation structure has a MOS structure in which shield gate electrodes made of a polycrystalline silicon (polysilicon) film are formed over a silicon substrate through a shield gate oxide film. This shield gate electrode is always kept at a constant potential of 0 V, for example, as it is grounded (GND) through a connection conductor when the silicon substrate (or a well region) has a P type conductivity. When the silicon substrate (or the well region) has an N type conductivity, the shield gate electrode is always kept at a predetermined potential (a powerful source potential Vcc [V], for example). As a result, because the formation of a channel of a parasitic MOS transistor on the surface of the silicon substrate immediately below the shield gate electrode can be prevented, adjacent elements such as transistors can be electrically isolated from one another. We then look to extrinsic evidence submitted by the appellants in the form of an article entitled “FULLY PLANARIZED 0.5Fm 7Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NextLast modified: November 3, 2007