Appeal No. 1998-0706
Application 08/166,279
interprocessor bus 12b is the data intended for one of the
processors connected to that bus (col. 7, l. 54 to col. 8, l.
9). Stored data intended for a processor in another cluster
is sent to the left or right adjacent cluster module 18 via
data link 22, 24, 26, or 28 without first being coupled to the
local interprocessor bus (col. 6, ll. 17-20 and 52-55).
The examiner contends it would have been obvious to
modify Allen's cluster modules so that they communicate all
data received by the data links to the local interprocessor
bus 12b because "by placing all incoming data on the
interprocessor bus and then examining it, the throughput of
the system is improved by eliminating a step taken by the
interface means" (Answer at 4). The examiner further explains
(Answer at 8):
In both the Applicant's claimed invention and
the system of Allen, the interface means is
responsible for determining whether or not a message
is destined for a processor in that group. By
communicating all message data onto the
interprocessor bus and then taking action, the
complexity and cost of the system become reduced
because the buffer then only stores the messages
which are destined for processors that are not part
of the present group.
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