Ex Parte ARAI - Page 2




          Appeal No. 1998-2966                                                        
          Application 08/605,566                                                      

                                     BACKGROUND                                       
               The disclosed invention addresses a problem which occurs in            
          prior art non-volatile semiconductor memory devices as shown in             
          figures 7 and 8.  An impurity ion 16 invading from a defective              
          portion of passivation film 12 moves in interconnection layer 11            
          or an interface between interconnection layer 11 and interlayer             
          insulating film 9 and might penetrate underlying insulating                 
          film 8 and side wall 17 to reach floating gate electrode 5                  
          (specification, p. 5, lines 20-25).  These impurity ions may                
          cancel the electric charge of the electrons stored in the                   
          floating gate electrode 5 and, in an extreme case, data stored in           
          the non-volatile memory cell is inverted, leading to                        
          defectiveness of the cell (specification, p. 2, lines 16-25).               
          The disclosed invention provides an impurity introduction                   
          conductive layer between the interconnection layer 11 and the               
          interlayer insulating film 9, which traps the invading impurity             
          ion as illustrated in figure 1.                                             
               Claim 1, the sole independent claim, is reproduced below.              
                    1.  A non-volatile semiconductor memory device,                   
               comprising:                                                            















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