Appeal No. 1998-2966
Application 08/605,566
Claim 1 is drawn to a non-volatile semiconductor memory
device structure. The function of the impurity introduction
conductive layer of preventing floating gate ion invasion is not
recited. While the function does not have to be recited, it is
improper to narrow the scope of the claim by implicitly reading
in disclosed limitations from the specification which have no
express basis in the claims. See In re Prater, 415 F.2d 1393,
1404, 162 USPQ 541, 550 (CCPA 1969); In re Priest, 582 F.2d 33,
37, 199 USPQ 11, 15 (CCPA 1978) (inferential limitations are not
to be read into the claims); In re Self, 671 F.2d 1344, 1348,
213 USPQ 1, 5 (CCPA 1982) ("Many of appellant's arguments fail
from the outset because . . . they are not based on limitations
appearing in the claims."). Thus, it is not necessary that the
combination of references teach or suggest solving the floating
gate ion inversion problem because it is not claimed.
We agree with the Examiner that Higuchi suggests providing
an impurity introduction conductive layer of a second
conductivity type in the contact hole of the APA or Kobayashi to
minimize the resistance and Shottky barrier. This teaching
applies regardless of the type of semiconductor device. Although
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