Appeal No. 1999-1131
Application No. 08/754,758
semiconductor devices; 2) second pins connected to signal
lines and not connected to one or more semiconductor devices;
and 3) wherein the first pins are provided on a first side,
the second pins are provided on a second side and the second
side is substantially perpendicular to the first side.
Our review of the Michael prior art discloses that
Michael's Figure 2 illustrates control signal pins, e.g., RAS,
CAS, WRITE and data-input/output pins, e.g., DI, DO. However,
we do not find that the control and data pins of Michael are
respectively provided on sides that are "substantially"
perpendicular to each other.
Turning to the Takeda prior art, we note that Takeda also
discloses control pins, e.g. WE, RAS, CAS, and data-
input/output pins, e.g. DIN, DOUT. However, as in Michael, we
find that the control and data pins of Takeda are not provided
on sides that are “substantially” perpendicular to each other.
In particular, Takeda's Figure 6 illustrates a configuration
that shows the WE control pin and the DIN, DOUT data-
input/output pins on the same side.
Considering the Murai prior art, Murai’s Figure 2
illustrates control (address) pins on one side and data pins
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