Ex parte HIGUCHI et al. - Page 3




         Appeal No. 1999-1131                                                     
         Application No. 08/754,758                                               


              Appellants' independent claims encapsulate the various              
         embodiments of the invention.  Independent appealed claims 1,            
         10, 14 and 18 are herein respectively recited:                           
         1. A semiconductor device connected to one or more                       
         semiconductor devices of the same type, said semiconductor               
         device comprising:                                                       
              first pins for receiving signals commonly used with said            
         one or more semiconductor devices; and                                   
              second pins for being connected to signal lines which are           
         not connected to said one or more semiconductor devices,                 
              wherein all of said first pins are provided on a first              
         side of said semiconductor device and all of said second pins            
         are provided on a second side of said semiconductor device               
         substantially perpendicular to said first side, said first               
         pins and said second pins excluding pins for receiving power             
         voltages.                                                                
         10.  A semiconductor device comprising:                                  
              a semiconductor chip;                                               
              a package housing said semiconductor chip;                          
              first pins for receiving control signals for controlling            
         said semiconductor chip; and                                             
              second pins for inputting data to and outputting data               
         from said semiconductor chip,                                            
              wherein all of said first pins are provided on a first              
         side of said package and all of said second pins are provided            
         on a second side of said package substantially perpendicular             
         to said first side, said first pins and said second pins                 
         excluding pins for receiving power voltages.                             

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