Appeal No. 1999-2286 Page 3
Application No. 08/352,660
7. A synchronous communication system comprising a
plurality of subsystems coupled to a system bus,
each subsystem further comprising a [sic]
unidirectional control line coupled to the rest of
said plurality of subsystems whereby asymmetrical
control of said bus is arbitrated between a first
subsystem and a second subsystem based upon control
signals communicated one to another over said
control lines and through a transparent latch within
each of said first and second subsystems, each
transparent latch being coupled to
said control lines, and said first subsystem
transmitting a request and data substantially
simultaneously, said request being transmitted
during said transmission of said data.
The prior art applied by the examiner in rejecting the
claims follows:
May et al. (May) 4,811,277 Mar. 7,
1989
Craft et al. (Craft) 4,987,529 Jan. 22,
1991
Nakada et al. (Nakada), Bus Arbitration Method for a
Two-Way Multiprocessor, IBM Technical Disclosure
Bulletin, Oct. 1992, at 439-42.
Claims 1-7 and 9 stand rejected under 35 U.S.C. § 103 as being
obvious over Nakada in view of Craft. (Examiner’s Answer,
¶ 9.) Claim 10 stands rejected under § 103 as being obvious
over Nakada in view of Craft further in view of May. (Id.)
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