Ex parte HUDAK et al. - Page 1




               The opinion in support of the decision being entered today was not     
               written for publication and is not binding precedent of the Board.     
                                                            Paper No. 10              
                       UNITED STATES PATENT AND TRADEMARK OFFICE                      
                                     ____________                                     
                          BEFORE THE BOARD OF PATENT APPEALS                          
                                   AND INTERFERENCES                                  
                                     ____________                                     
                        Ex parte JOHN HUDAK and THOMAS R. NEAL                        
                                     ____________                                     
                                 Appeal No. 1999-2571                                 
                              Application No. 08/820,200                              
                                     ____________                                     
                                HEARD: October 11, 2001                               
                                     ____________                                     
          Before BARRETT, DIXON, and GROSS, Administrative Patent Judges.             
          GROSS, Administrative Patent Judge.                                         



                                  DECISION ON APPEAL                                  
               This is a decision on appeal from the examiner's final                 
          rejection of claims 1, 3, 5 through 11, and 13 through 19,                  
          which are all of the claims pending in this application.                    
               Appellants' invention relates to a method of making a                  
          semiconductor device using an SOI starting wafer and thinning               
          process with a non-SOI semiconductor fabrication process                    
          selected from CMOS, NMOS, PMOS, Bipolar, and BICMOS                         
          fabrication processes.  Claim 1 is illustrative of the claimed              
          invention, and it reads as follows:                                         





Page:  1  2  3  4  5  6  7  Next 

Last modified: November 3, 2007