Appeal No. 1999-2571
Application No. 08/820,200
and BICMOS" and using the selected process to form the
semiconductor device. The recited processes are non-SOI
fabrication processes, as explained in appellants'
specification (page 3, lines 2-4). CMOS, NMOS, PMOS, Bipolar,
and BICMOS circuits may be formed by such non-SOI processes or
by SOI processes such as silicon-on-sapphire. Thus,
disclosure of a CMOS, NMOS, PMOS, Bipolar, or BICMOS circuit
does not equate to a disclosure of a CMOS, NMOS, PMOS,
Bipolar, or BICMOS fabrication process.
Turning to the rejection, we find that the examiner
(Answer, page 3) relies on Sharma (column 1, lines 53-58, and
column 4, lines 30-34) as a teaching to select and use a CMOS
or Bipolar semiconductor device fabrication process. However,
Sharma states (column 1, lines 5-8) that the invention
"pertains to silicon-on-insulator (SOI) transistor
technology." Sharma (column 1, lines 9-58) goes on to discuss
SOI fabrication processes and the resulting CMOS and Bipolar
circuits. Thus, Sharma relates to CMOS and Bipolar circuits
formed by SOI fabrication processes, not by CMOS and Bipolar
(non-SOI) processes.
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