Appeal No. 2001-1523
Application No. 08/731,236
process such as the efficient manufacturing of the memory
components is sheer speculation. Therefore, we do not sustain
the obviousness rejection of claims 1 and 12 over Shiomi.
Christenson
The examiner rejects claims 1 and 12 under this reference
at page 3 of the final rejection (paper no. 24). Appellant
argues in response (brief at page 9) that “[f]irst, Christenson
is silent on forming semiconductor memories. Therefore,
contrary to the outstanding Office Action’s statement at
page 3, Christenson fails to teach forming contact holes in
a semiconductor memory circuit region, as recited in Applicant’s
claims. . . . Second, Christenson does not form bipolar
transistors at the locations of openings formed concurrently with
contact holes for semiconductor memories. Christenson forms
individual regions . . . .” The examiner responds first that
since Christenson teaches the making of an integrated circuit
involving capacitors, resistances, and transistors, it would have
been obvious to an artisan to utilize Christenson’s teachings in
making a memory involving a memory region; secondly, that
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