Appeal No. 1999-2347
Application 08/892,560
layer 18. A via 22 is plasma etched through layer 19 down to the
barrier material 18 and then the via is completed by etching the
dielectric barrier material 18 in a second etch step. Erie
discloses that the barrier layer 18 must be kept thin to allow it
to be removed rapidly before the metallization interconnect is
etched to avoid sputtering (col. 2, line 65 to col. 3, line 8).
Thus, Erie expressly discloses etching to avoid the problem of
sputtering of the metal layer.
Kim discloses a process for making unframed or borderless
contacts. Interconnects 24, which may be metal (col. 3,
lines 42-44) or doped polysilicon (col. 3, lines 54-58), are
covered with a thin aluminum oxide etch stop layer 28, which is
covered with a dielectric layer 30'. The layer 30' is etched by
reactive ion etching down to aluminum oxide layer 28' and the
aluminum oxide layer 28' is removed by another etch process
(col. 4, lines 13-32, 50-54). The aluminum oxide 28' acts as an
effective etch stop and prevents attack on the patterned
conductive layer 24 (col. 4, lines 36-39). However, Kim does not
explicitly describe that an attack on the patterned conductive
layer would cause non-conductive back-sputtered compounds to form
on the sidewalls of the via.
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