Appeal No. 2001-2164
Application No. 09/024,620
10, lines 25-42, of Singh, as well as column 6, lines 55 and 57-
60, of Wilson. The examiner alleges that the “associating a
priority...,” “detecting each response...” and “forwarding a
response...” limitations of the claim are disclosed at “column 8,
lines 33-39” (answer-page 4-though the reference is not
identified, we presume the examiner is referring to Singh).
For their part, appellants contend that Singh is “merely
pointing out the prior art MESI coherency protocol...Singh does
not describe any cache coherency state corresponding to the
tagged state...” (principal brief-page 6) because the “tagged
state” refers to a cache line which contains a modified value.
While the prior art, including Singh, refers to a “Modified (M)”
state (e.g., Singh-column 8, line 26), appellants argue that the
“primary distinction” between that “modified” state and the
“tagged” state of the instant claimed invention “is that the
“tagged” state is used when a value is not only modified, but
also shared by multiple caches (horizontal caches, i.e., caches
associated with different processing units). The ‘modified’
prior art state can only be used with a single cache; in other
words, if a cache is in the prior art ‘modified’ state, that
value is not shared by any other caches in the multi-processor
computer system” (principal brief-page 6).
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