Appeal No. 2001-2164
Application No. 09/024,620
cache memory is updated to be, in fact, consistent with the data
in the system memory. Column 10, lines 18-19, of Singh, also
states that “the processor uses these micro-operations to
maintain the cache consistency” (emphasis added), suggesting,
yet, again, that Singh is interested in cache consistency with
the processor, or system, memory, rather than the inconsistency
required by the instant claims.
Thus, we find no teaching or suggestion in Singh of a tagged
state and associated tagged intervention response of the claimed
invention.
Turning to Wilson, we find nothing therein that would remedy
the deficiency of Singh with regard to the inconsistency of data
between the cache and the system memory. While the examiner
cites lines 55 and 57-60, of Wilson, we agree with appellants
that this portion of Wilson appears only to disclose that a cache
having an exclusive copy of data can supply the data to a
requesting cache instead of main memory. Appellants allege that
it is well known that “if a cache holds data in the Exclusive
state, the data are by definition consistent with the main memory
and held in only a single one of a plurality of horizontal
caches.” The examiner offers no convincing rebuttal to this
allegation.
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