Appeal No. 2003-0886
Application No. 09/466,845 Page 2
of the invention can be derived from a reading of exemplary claim
1, which is reproduced as follows:
1. A semiconductor device comprising:
an insulating film, a plurality of word lines parallel to
one another, a gate insulating film and a first conductivity type
semiconductor layer that are formed in this order;
wherein the surface of said insulating film is rendered flat
with respect to the surface of said word lines, and said first
conductivity type semiconductor layer includes parallel bit lines
each comprising a second conductivity type high concentration
impurity diffusion layer crossing said word lines, and
wherein on at least one of the bit lines a salicide film is
formed on and in contact with the surface of said second
conductivity type high concentration impurity diffusion layer.
The prior art references of record relied upon by the
examiner in rejecting the appealed claims are:
Hirano 5,652,159 Jul. 29, 1997
Kapoor 5,780,350 Jul. 14, 1998
Chen et al. (Chen) 5,828,113 Oct. 27, 1998
Claims 1, 4, and 5 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Chen in view of Hirano.
Claims 2, 16, and 17 stand rejected under 35 U.S.C. § 103(a)
as being unpatentable over Chen in view of Hirano and further in
view of Kapoor. Rather than reiterate the conflicting viewpoints
advanced by the examiner and appellant regarding the above-noted
rejections, we make reference to the examiner's answer (Paper No.
16, mailed November 20, 2002) for the examiner's complete
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