Appeal No. 2003-0886
Application No. 09/466,845 Page 10
result in reduced contact resistances for the transistor. In
view of Chen's double density MROM structure having bitlines and
wordlines, we agree with appellant (brief, page 6) that if a
silicide layer were added above the bitlines 44, that when the
top gate dielectric 48 were then added, the heat from the process
would cause the silicide layer to be degraded. In addition, we
find no teaching or suggestion in the references to provide the
silicide layer of a transistor for an active matrix LCD into a
double density MROM structure. From all of the above, we find
that the examiner has failed to establish a prima facie case of
obviousness of claim 1. Accordingly, the rejection of claims 1,
4, and 5 under 35 U.S.C. § 103(a) is reversed.
We turn next to the rejection of claims 2, 16, and 17 under
35 U.S.C. § 103(a) as unpatentable over Chen in view of Hirano
and further in view of Kapoor. Turning to independent claim 16,
we find that claim 16 requires, inter alia, “wherein in at least
one of the bit lines a salicide film is formed on and in contact
with the surface of said second conductivity type high
concentration impurity diffusion layer but not on the surface of
said adjacent low concentration impurity diffusion layers.”
The examiner's position (answer, page 5) is that Chen “does
not teach that second conductivity type low concentration
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: November 3, 2007