Appeal No. 2001-1118
Application 09/262,690
suggestion, the applicants need not present additional evidence as to the electrical or capacitive
potential of the overlap. The Examiner initially bears the burden of establishing a prima facie
case of anticipation or obviousness based upon the prior art. Here, the examiner has failed to
sufficiently demonstrate that Chakravorty meets the “substantially removed” feature as defined in
the applicants’ specification, by explaining why the first liner layer overlap taught in Chakravorty
is insufficient to significantly effect the electrical and capacitive potential of the final via
structure. Based on the record before us, Chakravorty teaches an overlap that is significant to
ensure good electrical contact with the underlying seed layer. As the seed layer is apparently part
of the final structure of the via, such electrical contact between the seed layer and the liner layer
would significantly effect the electrical and capacitive potential of the final via structure. The
examiner fails to provide a contrary explanation, and therefore we cannot sustain the rejection of
claims 11-27.
Independent claims 18 and 23 and dependent claims 15, 19-22 and 24-27 were rejected
based on the combination of Chakravorty and Hoshino. The examiner relies on Hoshino to teach
a specific TaN/Ta liner layer, and not to teach the “substantially removed” feature of the first
liner layer. Consequently, as applied by the examiner, Hoshino does not make up for the
deficiencies of Chakravorty.
For dependent claim 12, the examiner relies on Nakajima to teach a first layer of
semiconductor material and not to teach the “substantially removed” feature of the first liner
layer. As applied by the examiner, Nakajima does not make up for the deficiencies of
Chakravorty.
7
Page: Previous 1 2 3 4 5 6 7 8 9 Next
Last modified: November 3, 2007