Appeal No. 2002-0792
Application 08/801,646
We note that Appellants claims 40 recites:
allocating a shared arena within the memory, wherein
the shared arena is accessible to said first and second
kernel level schedulers and wherein the shared arena
includes a user-level run queue;
setting a number requested variable within the shared
arena requesting that one or more processors from the
plurality of processors be assigned to process the plurality
of threads;
setting, via the first kernel level scheduler, a number
allocated variable within the shared arena indicating the
number of first processors that are assigned to process the
plurality of threads;
selecting one or more of the plurality of threads from
the user-level run queue;
assigning one of the plurality of threads selected from
the user-level run queue to each of the assigned first
processors;
adding to the number allocated variable within the
shared arena a number indicating the number of second
processors that are assigned to process the plurality of
threads;
selecting one or more of the plurality of threads from
the user-level run queue.
Appellants’ claim 52 recites:
allocating a first and a second shared arena within the
memory, wherein each shared arena includes a register save
area;
forming a queue of threads from the first program;
forming a queue of threads from the second program;
setting a number requested variable within the first
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