Appeal No. 2003-0487
Application No. 09/158,925
read data recorded on three tracks of the recording media. The output of these readers
is amplified and input into a crosstalk removing circuit (see figure 2 and page 5 of
appellants’ specification). The output of the crosstalk removing circuit is input to a
phase detecting circuit that detects phase error. This phase error is then used to
generate a clock signal (see page 9 of appellants’ specification).
1. A clock generator in a recorded information reproduction apparatus for
reproducing recorded information from a recording medium, comprising:
a pickup which produces a reading signal by reading a recording track of the
recording medium;
a sampling circuit which samples the reading signal at a timing corresponding to
a clock signal and produces a reading sample value sequence;
a crosstalk removing circuit which removes crosstalk components from the
reading sample value sequence and produces a crosstalk removed reading sample
value sequence, the crosstalk components being present in recording tracks adjacent to
the recording track read by the pickup;
a phase detecting circuit which detects a phase error existing in the reading
signal based on the crosstalk-removed reading sample value sequence; and
a clock signal generating circuit which generates the clock signal based on the
phase error.
References
Hayashi 5,657,312 Aug. 12, 1997
(filed March, 13 1995)
Iwanaga JP 3-178040 Aug. 2, 1991
(Japanese patent)
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