Appeal No. 2003-0487
Application No. 09/158,925
On page 7 of the answer, the examiner responds that for the rejection he is
relying on figure 9, not figure 3, of Hayashi to teach the phase error detection circuit.
The examiner asserts that Hayashi teaches “in column 8, lines 12-15, the sum (output
of ADD element in fig. 9) is indeed a signal whose cross talk has been cancelled
(removed).“
Anticipation is established only when a single prior art reference discloses,
expressly or under the principles of inherency, each and every element of a claimed
invention as well as disclosing structure which is capable of performing the recited
functional limitations. RCA Corp. v. Applied Digital Data Systems, Inc., 730 F.2d 1440,
1444, 221 USPQ 385, 388 (Fed. Cir.); cert. dismissed, 468 U.S. 1228 (1984); W.L. Gore
and Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 1554, 220 USPQ 303, 313 (Fed.
Cir. 1983), cert. denied, 469 U.S. 851 (1984).
We disagree with the examiner’s rejection. As stated supra, we find that the
scope of the independent claims includes a phase detector, which detects a phase error
in a “cross talk removed reading sample value sequence,” and a clock signal is
generated based upon this error. We find that Hayashi teaches in column 8, lines 13 to
16 that “the affection of cross talk is cancelled in the phase error signal,” the output of
item “ADD” in figure 9. However, we do not consider the “ADD” element to perform the
same function as the claimed phase detection circuit. Hayashi does not teach that the
input to the phase error signal is a crosstalk removed sample value sequence, as is
required by the claims. We find that the canceling of crosstalk in Hayashi’s phase error
signal is due to placement of the control pits on the encoded media being read by the
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