Appeal No. 2003-0836
Application No. 09/205,086
applied rejection in the answer, which was not included in the
final Office action, constitutes a new ground of rejection. This
is not permitted under 37 CFR 1.193(a)(2) as explained in MPEP
1208.01. It is also unclear to us why Appellants chose not to
file a reply brief in view of the new ground of rejection in the
Examiner’s answer. However, for the purpose of this appeal, we
will only consider the 35 U.S.C. § 102(b) rejection which was
maintained by the Examiner in the final Office action.
With respect to the 35 U.S.C. § 102(b) rejection of claims
1-28 and 38-49, Appellants argue that DRTD lacks a “refresh
timing circuit for generating clock pulses used to trigger memory
refresh events” (brief, page 6). Appellants acknowledge that
DRTD describes a memory controller that only “supports” refreshes
(DRTD, page 14), but does not “generate” clock pulses used to
trigger these memory refreshes (brief, page 6). Appellants
further assert that although the Rambus Memory Controller (RMC)
may “control” refreshing, no timing circuitry is disclosed that
“generates” these clock pulses (brief, page 7). Specifically,
Appellants argue that the RMC receives external clock pulses to
trigger a memory refresh (brief, page 7), thus requires an
additional pin which may lead to an increase in circuit
complexity.
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