Appeal No. 2004-0633
Application No. 10/011,198
Furthermore, we incorporate the examiner’s position on this
rejection as set forth on pages 5-7 of the answer, as our own.
On page 6 of the answer, the examiner recognizes that Cronin
does not expressly teach or suggest two interconnects coupled
through a plug as required by claim 34. The examiner relies
upon Ito for teaching a wiring structure with two overlapping
aluminum wire layers 25 and 30, electrically coupled through a
columnar projection 26, that is integral to the lower wiring
layer. Answer, page 6. The examiner states that it would have
been obvious to have modified the teachings of Cronin by
including an overlapping interconnect electrically coupled to an
underlying interconnect as taught by Ito in order to provide
electrical contact between the two metallization levels. The
examiner relies upon Yu for teaching memory cells of a random
access memory that utilizes interconnects. The examiner states
that Yu therefore shows that it is known in the art to use
interconnects in a random access memory for a memory cell.
Appellants do not argue any conflict between the process in
Cronin and Ito. Appellants argue a conflict between Ito and Yu,
and between Cronin and Yu. We have already addressed the
alleged conflicts between Ito and Yu. For the same reasons, we
are not persuaded by appellants’ asserted conflicts between
Cronin and Yu. The examiner is simply relying on Yu for showing
that it is generally known in the art that memory cells of a
random access memory utilize interconnects to connect to
underlying field effect transistors, which appellants do not
dispute.
With regard to Cronin in view of Ito, the issue is whether
one of ordinary skill in the art would have been motivated to
utilize a plug to connect the interconnect lines of Cronin.
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