Ex Parte Bass et al - Page 1



            The opinion in support of the decision being entered today was not written
                   for publication and is not binding precedent of the Board.       
                                                                Paper No. 19        
                      UNITED STATES PATENT AND TRADEMARK OFFICE                     
                                     ____________                                   
                          BEFORE THE BOARD OF PATENT APPEALS                        
                                  AND INTERFERENCES                                 
                                     ____________                                   
                      Ex parte STEPHEN L. BASS and ROHIT BHATIA                     
                                     ____________                                   
                                 Appeal No. 2004-1629                               
                              Application No. 09/507,204                            
                                     ____________                                   
                                       ON BRIEF                                     
                                     ____________                                   
         Before THOMAS, KRASS and SAADAT, Administrative Patent Judges.             
         SAADAT, Administrative Patent Judge.                                       

                                  DECISION ON APPEAL                                
              This is a decision on appeal from the Examiner’s final                
         rejection of claims 1-21, which are all of the claims pending in           
         this application.                                                          
              We reverse.                                                           
                                     BACKGROUND                                     
              Appellants’ invention is directed to a method and apparatus           
         for maximizing instruction execution efficiency of a                       
         microprocessor’s pipeline data by preserving the stalled data.             
         In speed critical pipeline stages, the data is stored in a                 
         deferred stall register after the data is allowed to propagate             




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