Appeal No. 2005-2277 Page 6
Application No. 10/099,680
discloses no more than one implantation. Opining that "[i]t is desirable to fabricate the
source, drain and the field-relief region in a single implantation step in order to simplify
the TFT manufacturing process, which will reduce production costs and improve
throughput and yield," (Spec. at 2), the written description explains that "[i]t is an aim of
the [appellant's] invention to provide an improved method of defining field relief regions
in a single implantation step." (Id.) The written description also asserts that
"[c]ombined implantation of source, drain and field-relief regions can . . . be achieved
with the use of a masking layer or template for the definition of the field-relief region. . .
." (Id. at 3.) More specifically, it explains, "implantation of the semiconductor film 2 is
carried out, with the exposed portions of the perforated insulating layer 8 constituting a
first, partial mask, and the gate layer 10 acting as a second mask. This results in the
definition of a source 16 and drain 18, field relief regions 20, 22, and a conduction
channel 24 in the semiconductor film 2." (id. at 7.)
Interpreting the independent claim in view of the written description, the
aforementioned limitations require using a single implantation to define inter alia doped
source and drain regions and a field-relief region having a lower doping concentration
than that of the drain region.
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