Appeal No. 2005-2512
Reexamination Control No. 90/006,431
“In a preferred embodiment, the power net simulation engine [116] of the present
invention operates in conjunction with a transistor network (i.e., circuit) circuit simulation
engine [118].” ‘952 Patent, col. 3, ll. 27-30. These two simulation engines and
ChipViewer 120 are shown contained within the dashed-line block labeled “Rail Mill,” a
term which does not appear in the ‘952 patent specification but appears in some of the
cited references in descriptions of a “RailMill™” product available from Epic.
The transistor network simulation engine 118 in the “Rail Mill” block is described
as based on the “PowerMill” simulation product available from Epic and described in
Application 08/040,531 (now Patent 5,446,676), which is incorporated by reference in
the ‘952 patent. Id. at col. 4, ll. 35-43.6 It is therefore evident that PowerMill predates
RailMill. The transistor network simulation engine
simulates the circuit operation according to the input stimulus file and
specified power supply voltages. The transistor network simulation engine
generates the current drawn by the circuit devices, including the circuit
devices connected to the power net. The transistor network simulation
may utilize constant power supply voltages or the power supply voltages
calculated by the power net simulation.
Id. at col. 4, ll. 44-51.7
6 PowerMill is described in the Deng reference as a transistor-level power
simulator and analyzer providing the following functions: (1) accurate power estimation;
(2) DC leakage path detection; (3) short-circuit transient leakage estimation; (4) hot-spot
detection; and (5) power diagnosis. Deng at 3.
7 The transistor network simulation engine receives three input files:
The netlist file defines the circuit to be simulated and is constructed
7
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: November 3, 2007