Appeal No. 2005-2512
Reexamination Control No. 90/006,431
The power net simulation engine 116 is responsive to a power net netlist 114,
which is a list of the wire connections between the power (Vdd) or ground pads and the
circuit elements. Id. at col. 3, ll. 47-50. In the Figure 1 embodiment, the power net
netlist is extracted from an RC extraction database 112 generated by an ARCADIA
system from Archer, id. at col. 4, ll. 18-22, which is responsive to a DRACULA®
database 104 generated by a DRACULA® integrated circuit layout verification system
available from Cadence. Id. at col. 4, ll. 8-12. Alternatively, the power net netlist can be
provided by “other power net netlist extractors including power net netlist extractors.”
Id. at col. 4, ll. 23-32.
The power net simulation engine 116 “uses the current information [from
transistor network simulation engine 118] to calculate the voltage drop and current in
the branches of the power net. The power net simulation engine generates voltage
drop, electromigration and ground bounce warnings during simulation.” Id. at col. 4, ll.
51-54. The specification explains that “the present invention provides a ChipViewer
product that displays power net characteristics to the user.” Id. at col. 12, ll. 30-32.
During simulation, highlight computer files containing information about the voltage drop
or current density characteristics of the power net are read by the ChipViewer product,
which utilizes the highlight files in conjunction with the extracted power net netlist file to
display characteristics of the power net. Id. at col. 13, ll. 13-19. The ChipViewer
displays the different values for voltage drop and current density in different colors on
the layout so as to allow the user to quickly identify areas of interest. Id. at col. 4, ll. 56-
9
Page: Previous 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Next
Last modified: November 3, 2007