Appeal No. 2006-0910
Application No. 09/725,821
multiplexers suggested by Batcher. In our view, however, the
programmable logic device of Turner has little relevance to the
hash algorithm processors of Ober, Childs, and Turner and, at
best, provides only a disclosure that selective input
multiplexers may be known in the art. Similarly, our review of
the disclosure of Batcher, which is directed to a parallel array
processors, reveals nothing more than a teaching that the number
of circuit elements may be reduced by utilizing multiplexers.
Given the above discussed deficiencies in the applied prior
art, we fail to see how and in what manner the Ober, Childs, and
Schneier references might have been modified by Turner and
Batcher to arrive at the features set forth in appealed
independent claims, each of which requires a specific combination
of chaining variable registers and a function circuit coupled to
a multiplexer to deliver specific outputs dependent on a
particular hash algorithm being processed. The mere fact that
the prior art may be modified in the manner suggested by the
Examiner does not make the modification obvious unless the prior
art suggested the desirability of the modification. In re
Fritch, 972 F. 2d 1260, 1266, 23 USPQ2d 1780, 1783-84 (Fed. Cir.
1992). In our view, given the disparity of problems addressed by
6
Page: Previous 1 2 3 4 5 6 7 8 9 Next
Last modified: November 3, 2007