Appeal No. 2006-1783
Application No. 09/183,694
threads of sequential commands that exist simultaneously. An
understanding of the invention can be derived from a reading of
exemplary independent claims 3, 21 and 26 which are reproduced as
follows:
3. A data controller, that is couplable to a host and
coupled to a storage medium, microprocessor, local storage and a
buffer memory, comprising a command queuing engine that creates a
plurality of threads of sequential commands that exist
simultaneously while minimizing interrupts associated to the
commands.
21. A data controller of a peripheral device having a
storage medium and a processor, wherein the data controller
minimizes interrupts to the processor by re-ordering a plurality
of commands received from a host computer from an order of
arrival into an order of sequence in the storage medium.
26. A peripheral device that includes a data controller, a
microprocessor, a buffer memory, local memory and a storage
medium, and that is couplable to a host, wherein the data
controller creates threads of a plurality of commands and
generates interrupts at the beginning and end of the plurality of
commands relative to a data transfer.
The Examiner relies on the following references in rejecting
the claims:
Bean et al. (Bean) 4,543,626 Sep. 24, 1985
Jones et al. (Jones) 5,483,641 Jan. 9, 1996
Krakirian 5,781,803 Jul. 14, 1998
Claims 21, 22 and 26 stand rejected under 35 U.S.C. § 102(e)
as being anticipated by Krakirian.
Claims 23-25 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Krakirian and Bean.
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