Appeal No. 2006-1783
Application No. 09/183,694
it is implied that additional threads of a plurality of commands
will be created later (answer, page 9).
We agree with the Examiner that claim 26 does not require
that threads of a plurality of commands be created
simultaneously. In other words, as specified by the Examiner
(answer, page 4), the threads may be sequential with the
microprocessor interrupts occurring (col. 4, lines 4-43) at the
beginning and the end of the plurality of commands (col. 17,
lines 40-63). Therefore, the creation of threads for each set of
commands, although may occur at different times, reads on the
subject matter recited in claim 26.
In view of our analysis of the prior art reference, we find
that Krakirian discloses all the limitations of claim 26, but not
of claim 21. Therefore, we sustain the 35 U.S.C. § 102 rejection
of claim 26 but not of claim 21 and claim 22, dependent thereon,
over Krakirian.2
Turning now to the rejection of claim 3, we initially note
that unlike claim 26, claim 3 requires that the plurality of
threads of sequential commands exist simultaneously. The
Examiner relied on Jones for simultaneously creating a plurality
We also observe that claim 26 could be further considered for being unpatentable under 35 U.S.C. § 112,2
second paragraph as being vague. The claim recites creating “threads of a plurality of commands” while the
interrupts are recited as being “at the beginning and end of the plurality of commands.” It is not clear whether the
interrupts occur at the beginning and end of each thread or at the beginning and end of all of the commands.
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