Appeal No. 2006-2441
Application No. 10/056,224
teachings do not complement Bunnell’s teachings to yield the
invention as set forth in representative claim 9. Particularly,
the ordinarily skilled artisan would have readily been apprised
of the fact that Bunnell’s teaching of the CPU monitoring device
is limited to monitoring CPU data access to main memory when a
requested data is not available in the cache memory. Bunnell
indicates that the CPU monitoring device uses the cache signals,
inter alia, to determine when the computer is in transition from
an active to inactive state vice-versa. See column 4, lines 44
through 49. The ordinarily skilled artisan would have also
recognized that even though Bunnell teaches the issuance of a
miss entry when the requested data is not available in the cache,
it does not particularly teach keeping a log of such missed
entries, let alone generating and storing temporal identifiers
(time stamps) indicating the time of such missed entries.
Further, in stark contrast with the Examiner’s interpretation, we
note that the ordinarily skilled artisan would have recognized
that Bunnell’s teaching of a system clock does not lend itself to
generating and storing such temporal identifiers. Additionally,
it is our view that albeit Roeber teaches a central log for
recording events and time stamps associated therewith, such
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