Ex Parte Davison et al - Page 2

               Appeal 2007-1862                                                                             
               Application 10/722,652                                                                       


                      We affirm-in-part.                                                                    
                      As best representative of the disclosed and claimed invention,                        
               independent claims 1 and 20 are reproduced below:                                            
                      1.  An integrated circuit device comprising:                                          
                      a die having a top surface with a peripheral region and an interior                   
               region surrounded by the peripheral region:                                                  
                      a plurality of bond pads disposed in the peripheral region of the die;                
                      at least one internal bus, disposed in the interior region of the die, that           
               distributes power to a plurality of internal node points of the die; and                     
                      at least one bond wire connecting at least one of the plurality of bond               
               pads with the at least one internal bus.                                                     
                      20.  A method of constructing an integrated circuit device comprising                 
               the following steps:                                                                         
                      forming an integrated circuit die having at least one peripheral bond                 
               pad and at least one internal bus, the internal bus being configured for                     
               distributing power to a plurality of internal node points of the integrated                  
               circuit device; and                                                                          
                      wire bonding the at least one peripheral bond pad to the at least one                 
               internal bus.                                                                                

                      The following references relied on by the Examiner:                                   
                      Taylor  US 6,727,597 B2          Apr. 27, 2004                                        
                                                                            (Filed December 27, 2001)       
                      Exhibit A  Fig 3B of Taylor                                                           



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