Ex Parte Davison et al - Page 3

               Appeal 2007-1862                                                                             
               Application 10/722,652                                                                       


                      Claims 1 through 8, 14, 15, and 17 through 20 stand rejected under                    
               35 U.S.C. § 102(e) as being anticipated by Taylor.                                           
                      Rather than repeat the positions of the Appellants and the Examiner,                  
               reference is made to the Brief and Reply Brief for Appellants’ positions, and                
               to the Answer for the Examiner’s positions.                                                  
                                                    OPINION                                                 
                      Because we affirm only the rejection of independent claim 19, we                      
               reverse the rejection of claims 1 through 8, 14, 15, 17, 18, and 20.                         
                      Independent claim 20 reflects the recitation of “wire bonding the at                  
               least one peripheral bond pad to the at least one internal bus.”  In a                       
               corresponding limitation, independent claim 1 recites a “bond wire”                          
               connecting at least one of the recited bond pads with at least one of the                    
               internal buses.  Claim 19 specifies that “the plurality of bond pads and the at              
               least one internal bus are connectable by at least one bond wire.”                           
                      In considering Taylor, we note initially that the prior art showing in                
               Figure 1 illustrates the use of wire bonds 104 to connect integrated circuit                 
               die 102 to its package 110.  Figure 2 illustrates the prior art use of C4                    
               technology to mount an integrated circuit die 202 to a package 210.                          
               Taylor’s contribution in the art is best shown in figure 3C, which permits                   

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