Ex Parte Skoufis - Page 25



                                                                                                                                                           Integrated circuits                    261                                                    

                        ' arefully cleaned and polished single-crystal siliicon                                                                                                                                                                          
                        '                                                                                                                                                                                                                                
                        sdrface with an oxidant gas, usually oxygen or steam,                               slcs              oai                                               abeintegrated                                                            
                       jti ternperat1ures ranging from 1500 to 2200'F (800 to                                                                                                                                                                            
                       ,1,2o00C) in a quartz-walled furnace tube (Fig. 14a).                                                                                                                                                                               
                       Theý reaction occurs rapidly and exothermiically on the                                                                                                                                                                           
                 S      ilicon surface. As the oxide film grows; the rate of                                                                                                                                                                             
                       ;Jxidatiofl decreases, because the oxidant must trans-                                                                                                                                                                            
                      .p~irt to the silicon surface through the growing film.                                                                                                                                                                            
                       'Fr large film thicknesses and at high oxidation tem-                               Fig. 13. Integrated-circuit fabrication sequence form. Fabrication normally proceeds in                                                       
                        pýratures, this transport controls the film growt                         i                                                                                                                                                      
               .4,      etics, while for thin films the surface reaction is                                                                                                                                                                              
                      ,dominant. SEE CHEMICAL BOND ING.                                                                                                                                                                                                  
                          !Chemical vapor deposition (CVD) is a gas-phase                                  the impurity has diffused to the proper depth and is                                                                                          
                        process where a film deposit is obtained by combining                              in the appropriate concentration in the silicon, the                                                                                          
                      ;tihe appropriate gases in a reactant chamber at ele-                                process is stopped. Other regions that are not to re-                                                                                         
                       V~ted temperatures. A typical CVD reaction (silox                                   ceive dopant are masked by using impenetrable films                                                                                           
                       pr~ocess) is given below. Figure 14b shows a cold-                                  known as diffusion masks. SEE CRYSTAL DEFECTS.                                                                                                
                                  1>                                                                          As device requirements become more stringent,                                                                                              
                                  1> SiH                                                                                                                                                                                                                 
                                      +0~         (400-5OO.C)             ~      'very                              sharp diffusion profiles are needed so that the                                                                                      
                                        Si40             -30F)SiO2 I+21-               2 Tdevice size can be reduced. The solid-state diffusion                                                                                                           
                                                                  (deposits                                process does not afford sufficient control for the most                                                                                       
                                                                   as film)                                advanced device processes. For this purpose, the use                                                                                          
                                                                                                           of the direct implantation of impurity ions (electri-                                                                                         
                       walled, atmospheric-pressure CVD system where the                                   cally charged atoms) into the silicon lattice has been                                                                                        
                      .silicon slice is heated by rf energy. Figure 14c shows                              developed.                                                                                                                                    
                      ,alo-rueCDsse                               hr h lcsadpo                                Ion implantation is also used when greater precision                                                                                       
                      ',cess gases are heated in a partially evacuated furnace                             of dopant concentration is required or when a reduced                                                                                         
                      '-iube. This low-pressure process produces very uni-                                 temperature cycle is advantageous. Ion implantation                                                                                           
                      -form film thicknesses. SEE VAPOR DEPOSITION,                                        makes use of intense, uniforn beams of high-energy                                                                                            
                          Evaporation or sputtering of metal coatings is per-                              ions (typically 10-500 keV) of the desired dopant.                                                                                            
                      formed in a vacuum, with metal transport being pro-                                  These beams are formed in specialized accelerators                                                                                            
                      duced either by heat (evaporation) or bombarding ions                                such as Van de Graaff generators under high vacuum                                                                                            
                       (§puttering). The vacuum evaporator in Fig. 14d uses                                conditions (Fig. l4e). The beams can be focused, ac-                                                                                          
                       flixturing with planetary motion during evaporation.                                celerated, and purified by using mass spectrometry                                                                                            
                      This achieves uniform metal thickness over surface                                   techniques such as electrostatic plates and magnetic                                                                                          
                      topology on the silicon slice. SEE CRYSTAL GROWITH;                                  fields. The desired beam is then made to impinge on                                                                                           
                      '"SPUTTER!NG.                                                                        the silicon substrate which has appropriate masking so                                                                                        
                          Impurity doping. The unique electronic properties of                             that the dopant beam impinges on the proper area of                                                                                           
                      semiconductors are produced by substituting selected                                 the silicon surface. The energy is sufficient for the ions                                                                                    
                      impurities at silicon lattice positions in the silicon                               in the beam to penetrate the silicon surface, leaving a                                                                                       
                      crystal, a process called doping. The distortions in the                             distribution of dopant. The position of the peak of the                                                                                       
                      Chemical bonding due to the presence of impurities at                                distribution can be altered by altering the beam energy.                                                                                      
                      2!ttice positions cause some of the bonding electrons                               The amount of dopant can be altered by the beam cur-                                                                                           
                     'lin the crystal to have a higher energy than in a perfect                            rent and time of exposure. Damage is caused by the                                                                                            
                      ' crysta lattice and therefore be available for electronic                          collisions of the ions in the beam with the atoms in the                                                                                       
                      tconduction. Similarly, holes, which are the absence                                 silicon lattice, but much of the damage can be removed                                                                                        
                      of bonding electrons, are produced by other kinds of                                by thermal annealing at temperatures of about 1500'F                                                                                           
                     'ýi.mpurities. Both electrons and holes can carry electric                           (800-C). Remarkably sharp dopant profiles of precise                                                                                           
                      Current. In order to construct complex integrated cir-                              concentration can be achieved by using this technique.                                                                                         
                      cu1its, the impurities must be placed in adjacent re-                               SEE ION IMPLANTATION.                                                                                                                          
                      .ýgions in the semiconductor surface. The two predom-                                   Lithography. Lithography is necessary to define the                                                                                        
                      lenant methods of doping semiconductor surfaces are                                 small geometries required in integrated circuits. In li-                                                                                       
                      :thermal diffusion in high-temperature furnaces (Fig.                               thography the silicon slice is coated uniformly with a                                                                                         
                      14a) and ion implantation.                                                          thin film of photosensitive material called resist. If the                                                                                     
                          In the diffusional doping process, the regions of the                           lithography is to be performed optically, the inte-                                                                                            
                      .silicon surface to be doped are exposed to a concen-                               grated-circuit pattern to be transferred to the resist is                                                                                      
                      Itration of the dopant while maintaining a high tem-                                first created on a glass plate or "mask." This pattern                                                                                         
                      'Perature. Boron and phosphorus are dopants which                                   can then be transferred to the resist by a number of                                                                                           
                      can be introduced by thermal diffusion at tempera-                                  optical techniques. "These techniques range from di-                                                                                           
                              ~Ue                                                                                                                                                                                                                        
                               rm1500 to 2200oF (800 to 1200"'C). At these                                rect contact printing using a collimated source of ul-                                                                                         
                      tem~iperatures the silicon lattice contains a significant                           tra-violet light (Fig. 14J), to optical projection of a                                                                                        
                            Cobrof vacant lattice sites, that is, crystal lattice                         single integrated-circuit pattern with associated reduc-                                                                                       
                      Sites with missing silicon atoms. The impurity atoms                                tion (for example, 10: 1, 1: 1) and a precise x-y motion                                                                                       
                     ~,                                                                                                                                                                                                                                  
                      can migrate from vacant site to vacant site. The driv-                              of the silicon slice (direct step-on-wafer; Fig. 14g).                                                                                         
                      Ing force for this diffusion process is the concentra-                              Electron-beam direct patterning can be performed,                                                                                              
                        2'i~gradient of impurity atoms. Near the silicon sur-                             without a mask, by using a controllable electron beam                                                                                          
                      fAce there exists a large concentration of dopant,                                  and an electron-sensitive resist. Lithography has also                                                                                         
                      Wh4ile tn the silicon only a small number of impurities                             been achieved with x-rays, by their projection through                                                                                         
                      `,ecit There is a tendency for these concentrations to                              a special mask in close proximity to the slice. Direct                                                                                         
                      be equalized, thereby eliminating the gradient. When                                step-on-wafer photolithography, the most advanced of                                                                                           



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