Appeal 2007-2510 Application 10/389,456 1 Zant4, and Vossen5. (Examiner's Answer ("Answer") mailed 31 January 2 2007, at 4.) 3 b. Claims 29 and 30 are rejected under 35 U.S.C. § 103(a) as 4 being unpatentable over the combined teachings of Economikos, Van Zant, 5 Vossen, and Fitzgerald6. (Answer at 9.) 6 c. Claims 31 and 32 are rejected under 35 U.S.C. § 103(a) as 7 being unpatentable over the combined teachings of Economikos, Van Zant, 8 Vossen, and Moon7. (Answer at 10.) 9 2. The Examiner finds that "Economikos teaches all of the positive steps 10 of claims 21–28 and 33–39 except for the use of a substrate containing 11 germanium and explicitly teaching the CVD process is low temperature, or 12 below approximately 600 degrees, and that the layer to be oxidized and its 13 oxidized state contact the substrate." (Answer at 4–5; Office Action mailed 14 28 December 2005 ("Final Rejection") at 2.) 15 3. More particularly, the Examiner finds that Economikos teaches 16 providing silicon substrates and processes for forming trenches in them. 17 (Answer at 5.) 4 Peter Van Zant, Microchip Fabrication, A Practical Guide to Semiconductor Processing, 31 and 39 (3d ed. 1997). 5 John L. Vossen and Werner Kern, eds., Thin Film Processes II, 333 (1991). 6 U.S. Patent 6,646,322 B2, issued to Eugene A. Fitzgerald, 11 November 2003, based on application 09/906,438, filed 16 July 2001. 7 U.S. Patent 5,719,085, issued to Peter K. Moon, et al., 17 February 1998. 6Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
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