Ex parte YOSHIDA et al. - Page 4




          Appeal No. 95-1555                                                          
          Application 07/871,530                                                      


          layer of semiconductor material of said first conductivity type             
          and opening onto the top surface thereof;                                   
               a portion of said layer of semiconductor material of said              
          first conductivity type disposed between said source and drain              
          regions of the second conductivity type defining a channel                  
          region;                                                                     
               a gate electrode of conductive material disposed above said            
          channel region;                                                             
               a layer of insulation material interposed between said gate            
          electrode and said channel region and defining a gate insulator;            
               a region of the second conductivity type disposed in said              
          layer of semiconductor material of said first conductivity type             
          and extending between said source region and said second                    
          conductive material defining a capacitor plate of said trench               
          capacitor to connect said field-effect transistor to said                   
          capacitor of said memory cell and comprising an annular dopant              
          region of said second conductivity type bounding the upper                  
          portion of the vertical trench; and                                         
               the increased dopant concentration of said layer of                    
          semiconductor material of said first conductivity type in                   
          relation to said substrate of said first conductivity type                  
          limiting the growth of depletion layers to prevent linkage of the           
          capacitor to a capacitor of an adjoining memory cell by the                 
          formation of a depletion layer extending toward the capacitor of            
          the adjoining memory cell beyond an acceptable extent.                      
               16. A semiconductor integrated circuit device comprising:              
               semiconductor substrate means including substrate components           
          of at least a first conductivity type;                                      
               said semiconductor substrate means being provided with a               
          vertical trench extending thereunto from the top surface thereof;           
               a first liner of insulation material bounding the vertical             
          trench provided in said semiconductor substrate means;                      



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