Appeal No. 95-1555
Application 07/871,530
To answer this question, we first must determine what the
prior art places before the skilled artisan in his workshop.
Anderson teaches in column 1, lines 39-47, that for DRAMs of the
trench capacitor type, engineers have observed a problem in which
leakage current flows through the upper portion of the storage
node near the top of the trench into the silicon substrate.
Anderson states in column 1, lines 48-51, that it is the object
of their invention to provide a process which will eliminate
undesirable leakage current near the top of the trench for trench
capacitor type high density dynamic random access memories.
Anderson further teaches in column 1, lines 57-68, a method of
reducing gate diode leakage in trench type capacitor type dynamic
random access memory devices. Anderson teaches that the storage
node of the capacitor is formed by placing a storage node
material, such as arsenic, into the trench walls of the device at
a first tilt and a second tilt. The angle of the second tilt is
higher than the angle of the first tilt. This higher angle
provides the storage node with a larger concentration of doping
around the upper portion of the trench walls. This larger
concentration of doping reduces the charge leaking for the upper
portion of the storage node into the substrate of the
semiconductor material.
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