Appeal No. 95-3497
Application 08/158,649
number equal to the number of stages in shift register 13 to
produce a value representing a moving average of the output
values (col. 1, lines 41-53). Thus, as Appellants correctly
note, Gerrath's adder 8 and shift register 13 do not perform a
sum-divided-by-two function, as alleged by the examiner, with the
result that Gerrath fails to suggest modifying Patti in a way
that satisfies claim 3 or claim 14. Nor has the examiner
explained why one skilled in the art, knowing that a shifter can
be used to effect division by two, would have been motivated to
use bit shifting in Patti's adder in order to generate the sum
divided by two of the corresponding 8-bit sub-words of the input
values A and B (which would satisfy claim 3) or in order to shift
the sum of the 16-bit input values A and B (which would satisfy
claim 14).
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