Appeal No. 95-3912
Application 08/087,247
examiner has provided evidence to us of the three respective
predetermined time intervals recited in this claim, that the
comparing step as well as the interrupt generation feature
occur in the combined teachings of the references in the
detail presented. The examiner’s position recognizes at the
top of page 5 of the answer that Fisk does not need a
conversion from serial to parallel data and vice versa since
the controller only receives and uses one bit at a time. On
the other hand, Federico’s shared communication line 80, often
referred to by the examiner in the rejection, is an Ethernet-
based communication system, which suggests only a serial link.
The examiner’s arguments make reference to the admitted prior
art Fig. 1 of the disclosed invention making reference to
serial input data and serial output data, but presents no
reasoning as to why the artisan would have utilized such
teachings in addition to the combined disparate teachings the
examiner has found and shown to exist in Fisk and Federico
respectively.
As to independent claims 14 and 20 on appeal, initially
we note that claim 20 recites a plurality of the individual
chain interface controllers in the same amount of detail that
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