Appeal No. 95-4708
Application 08/127,782
6 which is a 36 entry by 32-bit register file, not to the same
entry or portion of any one entry in the register file. While
one result is being stored in one entry, a different one can be
read from another. There is no teaching or suggestion from
Hinton that the same register parts, portions, or areas can or
should be accessed simultaneously in one clock cycle.
The appellants are correct that Hinton desires to avoid
conflicting access to the same register areas. In column 7,
lines 49-50, Hinton states: "Hardware checks for dependencies and
only issues the instructions that can be executed." In column 8,
lines 56-68, Hinton states:
During the second pipe stage shown in FIG. 3, the
resources [such as a register] are checked concurrently
with the issuing and beginning of the instructions so
this does not slow down the operating frequency. Each
instruction is conditionally canceled and ressued [sic,
reissued] depending on the resource check for that
instruction. Register Scoreboarding sets the
destination register or registers busy once it passes
the resource check. When the result returns -- whether
1 or many cycles later -- the resultant register gets
marked as not busy and free to use. Each multicycle
functional unit maintains a busy signal that is used to
delay a new instruction that needs to use this busy
unit.
Also, in column 12, lines 28-34, Hinton states:
A subsequent operation needing that specific register
resource will be delayed until this long operation is
completed. This is called scoreboarding the register.
There is one bit per 32-bit register called the
5
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Last modified: November 3, 2007