Appeal No. 95-3876
Application 08/222,009
TRIG and STOP in Fig. 5(a) ), which are emitted by control2
circuit 4 in response to command signals issued by control
circuit 7 in the camera body.
The specification describes operation of the flash
control circuitry of Figure 1 in two different modes, a normal
mode (Spec. at 16:20 to 22:10) and a high-speed synchro mode
(Spec. at 22:11 to 25:5). The following discussion concerns
operation in the normal mode. Referring to Figures 1 and
5(a), prior to commencement of a flash operation, the trigger
signal and the flash termination signal are both low and
transistors Q3-Q6 and the IGBT are off. Under these
conditions, voltage doubling capacitor C5 becomes charged to
the potential HV with the polarity indicated by the + and -
signs in the figure (Spec. at 16:13-14). When the trigger
signal goes high, transistor Q5 turns on, thereby turning on
transistor Q4, which connects voltage divider R8-R9 between
the DC voltage on capacitor C2 in constant voltage generating
circuit 2 and ground (Spec. at 18:6-11). The voltage which is
generated at the junction of these resistors is applied to the
gate of the IGBT to turn it on (Spec. at 18:14-20), thereby
See Spec. at 18:1-5 and 19:13-24.2
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